The interface between silicon and a high-k oxide


Introduction: Transistors, Gate-Oxides and Mr. Moore ...

Minituarisation has been the basis of the tremendous success of the semiconductor industry over the past decades. In 1965 Gordon Moore from Intel observed an exponential growth in the number of transistors per integrated circuit and predicted that this trend - now commonly known as Moore's law - would continue. As a result of the continous downscaling of devices, the smallest structures have now, however, reached atomic dimensions and new materials are required to allow further scaling.

The four main building blocks of integrated circuits are resistors, capacitors, diodes, and transistors. Most important for the speedup of microelectronic devices has been the continous minituarisation of transistors. A transistor is a switch. Current between source and drain is switched on and off by applying a small voltage at the gate. In today's devices so-called MOSFETs (Metal Oxide Silicon Field Effect Transistors) have almost completely replaced the formerly used bipolar transistors.

A MOSFET consists of an n-(p-)doped silicon substrate with two, highly p-(n-)doped contacts, source and drain. The so-called channel region inbetween is covered by an insulating layer, the gate-oxide, which is in contact with the gate electrode. Without applying a voltage at the gate electrode, no current can flow from source to drain as the pn-juctions between each contact and the substrate act as two opposite diodes. When applying a positive (negative) voltage at the gate electrode, the channel region close to the gate oxide is "inverted" (i.e. from n-(p-) to p-(n-)doped) and current can flow between source and drain.

Central to the functionality is the thin insulating layer, the gate-oxide. The gate-oxide acts as the dielectricum of a capacitor which attracts charge carriers into the channel region. Up to now, silicon dioxide (SiO2) has been used as a gate-oxide. The so far unparallelized electric and structural properties of silicon's native oxide - commonly known as window glass - are said to be one of the main reasons that silicon is today's semiconductor of choice.

Due to electrical considerations, the gate oxide thickness has to be proportional to the gate length (i.e. the distance between source and drain). The lateral scaling of transistor dimensions thus directly translates into a reduction of the gate-oxide thickness. Right now, oxide with a thickness of about 1.5 nm (one fifty-thousandth of the width of human hair) are employed. In 2007 less than 1 nm will be needed which corresponds to only 4 atomic layers. At these thicknesses, quantum mechanical tunneling currents through the oxide become intolerable.

The solution to the problem is to to replace SiO2 by an oxide with a larger dielectric constant (high-k). This allows to employ thicker films while retaining the capacitance of an ultrathin SiO2 layer.

The first high-k oxides introduced technologically are likely to be amorphous oxides or silicates of Hf and Zr with an interfacial SiO2 layer. Around 2010 however, an interfacial SiO2 layer will no longer be tolerable and oxides with an atomically well defined interface with silicon will be required.

McKee et al demonstrated in 1998 (Phys. Rev. Lett. 81, 3014-3017 (1998)) that an atomically abrupt crystalline interface between SrTiO3 and silicon can be formed. The growth process, the interface structure and stoichiometry as well as the electrical properties of these films are, however, still heavily debated. SrTiO3 is considered to be one of the most promising candidates for crystalline gate-oxides.


Interface formation

Our studies on Sr deposition on Si(001) have shown that half a mono-layer of Sr chemically saturates the silicon substrate and that the resulting surface does not exhibit states in the gap of silicon. On top of this Sr-passivated silicon surface we simulated the layer-by-layer deposition of SrTiO3 starting with a SrO layer. We find that the perfect bulk perovskite structure forms and remains stable at high temperatures in our molecular dynamics simulations. We will refer to this structure as interface A (picture on the left).

The chemistry of this interface is very different from what is known about the Si/SiO2 interface and reveals a new binding principle for oxides on silicon. The Si/SiO2 interface exhibits strong bonds (oxygen bridges) accross the interface. In the case of Si/SrTiO3 both, the Sr covered silicon substrate and the SrO layer of the oxide are chemically saturated. The interaction between substrate and oxide is thus purely electrostatical, there are no bonds across the interface.

For this type of interface, the two building blocks, the silicon substrate and the oxide must therefore be:

Despite the funtamentally different interface structure and stoichiometry proposed, our interface reproduces the main features of the Z-contrast images of McKee et al.2 such as the pattern of interfacial Sr atoms and the oxide-substrate registry.

In a device the interface will be exposed to a number of chemical influences that can affect the stability. The most critical question is the stability with respect to oxidation. Oxygen ions can diffuse out of the gate oxide to the interface during growth or device operation. Our calculations show that oxygen first binds to the filled dangling bond states of silicon. At a coverage of one monolayer, all these positions are occupied. This structure will be called interface B (picture on the right). Subsequent oxygen atoms will enter into the dimer bonds.

Our phase diagram for interfacial oxygen shows that interfaces A and B are thermodynamically stable against bulk SiO2 formation (the zero-line of the chemical potential). The high kinetic barriers for SiO2 formation (amorphous) is, however, expected further delay substrate oxidation significantly.


Band offset engineering

Identifying an oxide with a large dielectric constant which is thermodynamically stable in contact with silicon is only one part of the problem. To be a good insulating layer, the conduction band offset of the oxide with respect to silicon has to be greater than 1 eV. Recent experimental and theoretical papers have, however, reported that the band offsets for a number of high-k oxides are too small to meet technological requirements.

While the conduction band offset for interface A is predicted to be just around 0.2 eV, the band-offset of interface B lies in the region of 1.3 eV and thus above the technologically required 1 eV. The sizeable shift of 1.1 eV with respect to interface A can be explained by an interfacial dipole due to the oxygen monolayer in structure B.

In case of interface A the interfacial layer formally consists of Si1- and Sr2+ ions. After introducing oxygen, the silicon atoms are formally 1+ and the oxygen atoms 2-. This dipole shifts the electrostatic potential and thus the band-structure in the oxide relative to interface A.


References

Background information

Authors


Computational Quantum Theory Group - Inst. of Materials Chemistry - Department of Chemistry - TU-Wien - Vienna Information
Last modifications: 23 Jan 2003 Clemens Först